This invention relates to non-volatile memory devices and, in particular, to initializing a read pipeline of a non-volatile sequential memory device with data from the memory array by sensing and storing the first two data bits in the first two memory locations of the device upon power-on and outputting the first data bit upon selection of the device and before the occurrence of a clock signal.
Memory devices are used in a number of different applications for storing data that is written into the memory array of the device. The stored data may then be accessed by an external device, such as a microcontroller, by reading the contents of the memory device wherein the contents of the memory device may contain the program code to control the operation of the microcontroller.
A non-volatile memory device is a device that is able to retain the data stored therein even when no power is applied to the device, as opposed to volatile memory devices whose contents are lost when power is removed. Common non-volatile memories include electrically programmable read-only memories (EPROMs) and electrically erasable programmable read-only memories (EEPROMs).
Sequential memory devices are memory devices that have the capability to output the contents stored at an address pointed to by an address counter in a sequential fashion. The address counter of the device is sequentially incremented in response to a received clock signal thereby allowing the entire contents of the memory array to be read out in a sequential fashion. A sequential memory device is unlike a random access memory (RAM) device because the address pointer of the sequential device cannot be written to, i.e., one cannot set the address pointer to any desired address to access data thereat, as in RAM devices. However, the address counter of a sequential memory device can be reset to the address of the first data location in response to a received reset signal.
Memory devices include a read data path for outputting its stored data in response to a read command. In a read pipeline structure, the read data path typically includes a sense amplifier and a D flip-flop. The D flip-flop is required for storing the data currently being output on the data output pin of the memory device, while the sense amp is reading the next bit to be output. Briefly, each sense amplifier is coupled to a bitline for serially receiving data bits from the memory array. The sense amplifier detects the voltage level appearing on the bitline and provides a corresponding logic voltage level to the data input of the D flip-flop indicative of the logic value of the bitline voltage. The stored value in the D flip-flop is finally outputted from the memory device upon a subsequent transition of the received clock signal.
However, such a read pipeline data structure suffers from the drawback that it takes at least three transitions of the received clock signal to output the first data bit: a first transition to begin pre-charging the bitline to a logic "1" state, a second transition to release the pre-charge and allow the memory cell to control the bitline voltage so that the data stored in the memory cell can be read by the sense amplifier, and a third transition to clock the D flip-flop and output the first data bit. Such a three clock delay cannot be tolerated when the memory device is required to start outputting data only a short time after being powered-up or selected.
It is therefore a principal object of the present invention to provide a circuit and method for initializing a read data path of a non-volatile sequential serial memory device with data from the memory array by sensing the first two data bits stored in the first two memory locations of the memory device upon power-on and outputting the first data bit from the memory device upon selection of the device and before the occurrence of a clock signal.
It is also an object of the present invention to provide a circuit and method for sensing the first two data bits of a serial memory device and storing these data bits in latches upon device power-up.